d
Size: a a a
d
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pushСделать:
push
push
call
mov dword[esp],
mov dword[esp+4],
mov dword[esp+8],
call
d
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d
.global I686_CallRealModeInterrupt
I686_CallRealModeInterrupt:
sub esp, 24
mov 20[esp], ebx
mov 16[esp], ebp
mov 12[esp], esi
mov 8[esp], edi
mov dword ptr 4[esp], offset 0f
mov dword ptr [esp], offset realmod_int_entry
jmp I686_EnterRealMode
0: mov ebx, 12[esp]
mov ebp, 8[esp]
mov esi, 4[esp]
mov edi, 0[esp]
add esp, 16
ret
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pushТы хочешь это заменить, насколько я понял, так:
push
push
3*2 = 6 uop
sub
mov
mov
mov
mov - 1 uop, sub - 1 uop
d
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; Example 2.2. Instructions split into µops
push eaxThe
PUSH EAX instruction may be split into two µops which can be represented as
SUB and
MOV [ESP],EAX. The advantage of this is that the
SUB ESP,4 µop can be executed even if the value of EAX is not ready yet.
The CALL operation needs the new valueof ESP, so the CALL would have to wait for the value of EAX if the PUSH instruction was not
split into µops. Thanks to the use of µops, the value of the stack pointer almost never
causes delays in normal programs.
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ВВ
E
ВВ
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s
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | | | | | 1.0 | | | 1.0 | CP | push eax
| 2^ | | | 1.0 | | 1.0 | | | | CP | push ecx
| 2^ | | | | 1.0 | 1.0 | | | | CP | push edx
Total Num Of Uops: 6
Latency: 5 Cycles
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.3 | | | sub esp, 0xc
| 2^ | | | 0.5 | 0.5 | 1.0 | | | | CP | mov dword ptr [esp], eax
| 2^ | | | 0.5 | 0.5 | 1.0 | | | | CP | mov dword ptr [esp+0x4], ecx
| 2^ | | | 0.5 | 0.5 | 1.0 | | | | CP | mov dword ptr [esp+0x8], edx
Total Num Of Uops: 7
Latency: 7 Cycles
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Processor:Instruction uops latency
GoldMont+:
sub r, r/i 1 1
mov m, r 1 2
push 1 5
Pentium 4:
sub r, r/i 1 0.5
mov m, r 1 1
push 2 1
Silvermont:
sub r, r/i 1 1
mov m, r 1 3
push 1 8
Sandy Bridge:
sub r, r/i 1 1
mov m, r 1 3
push 1 1
Zen3:
sub r, r/i 1 1
mov m, r 1 0-3
push 1 6
AMD K7:
sub r, r/i 1 1
mov m, r 1 2
push 1 5