должна открываться, когда системный вызов вызовется, там и введешь

там это, китайцы новую архитектуру выкатили

LoongArch is a brand new instruction set, not an extension of MIPS. It includes 337 basic instructions, 10 virtual machine extensions, 176 binary translation extensions, 1024 128-bit vector extensions, and 1018 256-bit vector extensions, for a total of 2565 native instructions. Compared with MIPS, some instructions that are not suitable for modern CPUs are discarded, and a lot of improvements and extensions have been made. For example, the immediate data supported by a single instruction is expanded from the maximum 16 bits of MIPS to the maximum 24 bits, the branch jump offset is also expanded from 64K to 1M bytes, and the addressing space is changed from a fixed segment to a single plane, etc., which are all effectively reduced The target instruction number and memory access times of the compilation result are improved, and the efficiency is improved.　　2. LoongArch is still a RISC instruction set, 32-bit fixed-length instructions, 32 general-purpose registers, and 32 floating-point/vector registers. There are only 3 instruction formats for MIPS. LoongArch redesigned the instruction format to make up to 10 available formats, including 3 formats without immediate numbers and 7 formats with immediate numbers. The redesigned instruction format can include more instruction slots, which is conducive to future long-term development. LoongArch’s instruction system is designed with the goal of advancement, scalability, and compatibility. Compatibility refers to the integration of the main features of the MIPS/x86/ARM instruction system and efficiently supports binary translation.　　3. Loongson provides a Linux operating system based on LoongArch. In this operating system, in addition to running native LoongArch programs, it can also be translated into Linux programs compatible with MIPS, x86, ARM, and RISC-V instruction sets. When using LoongArch to translate any instruction, the general process is the same, but the efficiency will vary with the difference of the instruction system. Although the binary code of MIPS is different from LoongArch, most of the basic instructions of LoongArch are still similar to MIPS, so the translation overhead is very small. The translation efficiency for ARM and RISC-V is also higher than x86. Loongson will also provide a compiler with LoongArch as the target architecture. It is known that the compiler has realized the compilation of MIPS assembly code into LoongArch binary, and the C/C++ source code embedded with MIPS assembly can be compiled without modification.　　4. Loongson’s binary translation is different from qemu’s software translation. Loongson is a combination of software and hardware. For example, support for x86 flag registers, support for RISC-V atomic synchronization instructions, support for virtual-real conversion of memory addresses, etc., have specialized hardware implementations. The cross-system translation of qemu software generally only has 5% ~ 20% performance. Compared with qemu, Loongson’s translation has several times improvement in integer operations, and dozens of times performance improvement in floating point operations. This is an increase in CPU Performance improvement brought by dedicated hardware processing.　　5. The translation execution MIPS target is 100% native performance, the translation execution ARM target is 90% native performance, and the translation execution x86 target is 80% native performance. Windows can be installed and run in some way, and the overall translation execution target of Windows 70% native performance.　　6. Judging from the current existing test results, the C/C++ code is compiled into MIPS and LoongArch to run the test separately. LoongArch has nearly 17% performance improvement over MIPS, and the average performance of translation execution MIPS is about 100%.　　7.

All CPUs produced by Loongson after 2020 no longer support MIPS natively, but because it can perform 100% translation and execution of MIPS, the previous MIPS ecosystem is still fully compatible, but in the future it will focus on the development of the LoongArch native ecosystem.　　8. An autonomous command system alliance will be formed. The members of the alliance will use the LoongArch instruction set free of charge. The members of the alliance can get Loongson’s CPU core designs that are lower than the ARM A53 performance for free. There will be no command system lawsuits between alliance members (to prevent Intel/ARM When they are squeezed in, once they are added, it is equivalent to the x86/ARM instruction set confiscated).

ух, сорян, за длиннопасту

а ссылка есть?

кажется, они взяли за основу MIPS и сделали свой конструктор в духе ARM

выглядит интересно, но не уверен что взлетит

только гуглить в инетах с гугль транслейтом (

обещают полную патентную чистоту

причем здес ьпереводчик и то что я спрашиваю?

ну ты ссылку на что хочешь?

.

потому что это например отсюда ) https://www.zhihu.com/question/414069789

Не удивлюсь если сама эта архитектура вообще не будет доступна пользователю, только торчащий наружу бинарный конвертер из другой архитектуры

а чего тогда на английский перевел, а не на русский?

обычно с русским все хуже в переводе с азиатских

тому же гуглю китай более актуален на английском ) и сил вбухано больше

класс 👍 😁 подсунул, сынишке сказал, робота будешь собирать, сидит тыкает 😁 робота собирает!